1. Field of the Invention
This invention relates to an integrated circuit and more particularly to an integrated circuit metallization layer having nitride and silicide regions.
2. Background of the Relevant Art
To form an integrated circuit from a group of devices manufactured simultaneously upon the same monolithic substrate, the devices must be electrically connected to one another. The entire process of making ohmic contact to the devices and routing conducting material between ohmic contacts is defined herein as "metallization." While materials other than metal are often used, the term metallization is generic in its application and is derived from the origins of interconnect technology, where metals were the first conductors used. As the complexity of integrated circuits has increased, the complexity of the metallization composition has also increased. Accordingly, metallization may incorporate conductive materials other than metals.
It is not uncommon to have several levels of metallization spaced from each other across the upper substrate surface. In addition, each level of metallization may contain multi-layers of conductive material. As such, metallization may include one or more layers, whereby certain layers may be used in the contact region and other layers configured as interconnect routing between the contacts. Metallization thereby uses specific composition in the contact area to enhance adherence to the underlying silicon. The material used in the contact area, however, may not be suitable as a routing material. Therefore, routing may, for example, utilize a material which is more highly conductive and easier to deposit and etch than the contact area material.
The low resistivity of aluminum, excellent adherence to both silicon and silicon dioxide, and the ohmic contact it makes to silicon assures it as an attractive conductor for use in the multi-layer metallization scheme. Aluminum can be easily deposited on silicon using conventional techniques such as evaporation or sputtering. Unfortunately, with the advent of high density integrated circuits having thinner diffusion junctions, some of the other properties of aluminum have prevented its complete applicability as the sole composition of the metallization layer.
Referring to FIG. 1, modern integrated circuit manufacture often utilizes relatively thin diffusion junctions 10 placed within the upper surface of silicon or gallium arsenide substrate 12. Junction 10, contained within an active region between thick oxide areas 14, provides an ohmic contact region upon which metallization layer 16 can be deposited. If metallization 16 comprises only aluminum without other multi-layer components, then certain deleterious effects may arise when the aluminum is brought in contact with the doped silicon junction. The most important outcome of aluminum and silicon bonding is silicon's appreciable solubility into the aluminum. Aluminum's ability to dissolve thin layers of silicon or silicon dioxide helps ensure good physical contact or adherence. However, if enough silicon dissolves in the aluminum, small pits can form in the silicon surface. The pits are filled with aluminum and the phenomena, often referred to as aluminum spiking, occurs. As aluminum fills the pits or voids left by the outdiffusing silicon, the amount of aluminum fill can extend completely through a thin junction 10 as shown by reference numeral 18. Aluminum passing completely through the junction provides a conductive path through the junction thereby rendering the device inoperable.
The formation of pits or voids within the silicon is often achieved during sintering operation. Sintering at 300.degree. C. produces discernable pitting at depths to 0.2 .mu.m. At 350.degree. C., pits of 0.5 .mu.m have been observed and at 450.degree. C., pits of 2.0 .mu.m may occur. In order to prevent such pitting, aluminum may be deposited saturated with silicon so that it is unable to absorb any more silicon when contacted with the substrate. Alternatively, or in addition to using saturated aluminum, a thin barrier layer may be placed between the aluminum and silicon. The barrier reduces or minimizes cross-diffusion and destructive reaction between silicon and aluminum, yet allows charge carriers to pass freely from the junction to the overlying metallization.
There are many types of barriers which may be used. A sacrificial barrier is one having a finite lifetime. A sacrificial barrier can be initially placed between the aluminum and silicon where it is eventually consumed by the formation and diffusion of intermediate compounds at the aluminum/barrier interface and the barrier/silicon interface. Sacrificial barriers are predominantly made of pure metals such as transition or refractory metals (or bi-metallic alloys). Aluminides and silicides form at the aluminum/barrier interface and barrier/silicon interface, respectively, and then diffuse outward throughout the barrier material until the initial barrier composition no longer exists. Thus, sacrificial barriers provide only a temporary fix to the problem and do not meet the stringent long-term requirements of very large scale integration (VLSI) or ultra large scale integration (ULSI) technology.
A second class of barrier, known as a diffusion barrier, provides an infinite lifetime--as opposed to the finite lifetime of a sacrificial barrier. A diffusion barrier includes a diffusion layer made of an inert material placed between the aluminum and silicon. Diffusion barriers, being inert, do not substantially react with adjacent aluminum and silicon layers. Inert material, however, offers poor adhesion to the adjacent aluminum and silicon. In order to increase adhesion, multi-layers of dissimilar material are formed within the metallization embodying the barrier. A silicide is often used to aid barrier adhesion to silicon. Silicides generally have very high electrical conductivity and therefore make very dependable ohmic contacts. Silicides are formed by depositing a thin layer of refractory metals over the silicon surface, heating the surface to a high enough temperature for the silicon and metal to react in the active region, and then etch away the unreacted metal on top of the thick oxide. Subsequently, additional metallization layers are added to the exposed upper surface of the refractory barrier metal. Refractory metals often require temperatures near 600.degree. C. for silicide formation.
Many different types of refractory metals may be used to form the barrier layer within metallization. As shown below in Table I, refractory metals such as titanium and tungsten provide very low ohmic contact resistance in the active silicon region and therefore are preferred barrier materials.
TABLE I ______________________________________ Resultant Sinter Silicide Resistivity Temperature ______________________________________ TiSi.sub.2 13-16 .mu..OMEGA./cm.sup.2 900.degree. C. TaSi.sub.2 35-55 .mu..OMEGA./cm.sup.2 1000.degree. C. CrSi.sub.2 600 .mu..OMEGA./cm.sup.2 700.degree. C. MoSi.sub.2 100 .mu..OMEGA./cm.sup.2 1000.degree. C. WSi.sub.2 70 .mu..OMEGA./cm.sup.2 1000.degree. C. FeSi.sub.2 &gt;1000 .mu..OMEGA./cm.sup.2 700.degree. C. PtSi.sub.2 28-35 .mu..OMEGA./cm.sup.2 800.degree. C. CoSi.sub.2 18-25 .mu..OMEGA./cm.sup.2 900.degree. C. NiSi.sub.2 50-60 .mu..OMEGA./cm.sup.2 900.degree. C. ______________________________________
When a blanket film of refractory metal is placed over patterned oxide silicon surface and subjected to a thermal sinter, silicide forms only where the metal is in direct contact with the silicon substrate. The unreacted metal can be removed during wet or dry etch processing leaving silicide only in the active regions or windows (such as over source and drain areas). Silicides so formed are often referred to as self-aligned silicides or salicides. The formation of silicides can increase the effective contact area to enhance device operation.
The idea of opening a contact region using normal photolithography and then placing a barrier layer of refractory metal over the upper surface of the contact window is well known. Moreover, subsequent placement of a conductive material over the barrier and across selective regions of thick oxide is also well known. The fabrication steps necessary to deposit, sinter and pattern the various layers used in multi-layer metallization can be fairly complex and difficult to incorporate in a normal process flow. Generally speaking, barrier material and overlying aluminum can be deposited using conventional sputtering techniques. The barrier, however, is generally annealed prior to placement of overlying aluminum. Without anneal, implant-induced defects within the barrier and underlying junction (or active region) may remain thereby causing inoperable or improper circuit operation. Annealing helps induce the movement of implanted ions to their proper positions within the crystallographic lattice network. Such annealing can be performed in a separate rapid thermal anneal apparatus at high temperature and at high pressure as described in Hara, T., et al., "Formation of Titanium Nitride Layers by the Nitridation of Titanium in High Pressure Ammonium Ambient," Appl. Phys. Lett. 57 (16), 15 Oct. 1990; and, Kamgar, A., et al., "Self-Aligned TiN Barrier Formation by Rapid Thermal Nitridation of TiSi.sub.2 in Ammonia, "J. Appl. Phys. 66 (6), 15 Sep. 1989 (incorporated herein by reference). Both the Hara and Kamgar articles describe rapid thermal anneal (RTA) in the presence of ammonium to produce nitridation at the upper surface of the barrier during the formation of silicide at the barrier/substrate interface. The barrier is specifically described as titanium having a thickness of 900 .ANG. to 1200 .ANG.. Pure titanium barriers, however, do not exhibit columnar microstructure such as that present in a combination tungsten and titanium barrier. Unfortunately, tungsten and titanium films behave as rather poor diffusion barriers unless nitrogen is incorporated into the titanium and tungsten structure. As described in Dirks, A , et al , . "On the Microstructure-Property Relationship of W--Ti--(N) Diffusion Barriers," Thin Solid Films, 193/194 (1990) pp. 201-210, the columnar microstructure of combination titanium and tungsten readily combines with nitrogen to provide a more suitable diffusion barrier than offered by pure titanium or pure tungsten.
Barriers having titanium, tungsten and nitrogen inhibit cross diffusion better than if the barrier is pure titanium or pure tungsten. However, the methodology by which nitrogen is added to the combination barrier is often complex and cumbersome. Adding nitrogen to the barrier can fall outside the normal integrated circuit fabrication flow. Additional process or fab step can increase the cost of circuit manufacture and reduce yields. It is therefore advantageous that nitrogen be added during normal processing flow of the integrated circuit. Preferably, additional steps or equipment must be minimized in order to make titanium-tungsten barriers cost effective. It would therefore be desirable to incorporate nitrogen using the same processing equipment utilized, for example, in doping the substrate. Modification to pre-existing equipment must be eliminated or minimized. It is also important that the concentration of nitrogen be closely monitored during anneal, and that only controlled amounts of certain contaminants be allowed to enter the anneal chamber. It would therefore be desirable to utilize a low-pressure annealling chamber to ensure additional or undesirable contaminants not be allowed to enter the resulting barrier and thereby adversely affect device operation.